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Ali Azarpeyvand

Educational Background


PhD : University of Tehran, Iran, Computer Engineering , 2014-2007
Thesis Title : Reliability Analysis and Dependable Execution Techniques for Processors in Nano-Scale Technologies
Subject-class : Computer Architecture - Fault Tolerant Design
Supervisor : Professor S.M.Fakhraee

M.Sc : University of Tehran , 2000-1997
Thesis Title : Design and FPGA implementation of pager receiver baseband part
Subject-class : DSP
Supervisor : Professor S.M.Fakhraee

B.Sc : Sharif university of technology, Iran, Computer Engineering- Hardware , 1997-1993
Thesis Title : Modeling of DLX RISC processor in dataflow level of abstraction with VHDL
Subject-class : computer architecture
Supervisor : Professor Shahin Hessabi

 

 

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